Clarification of Rationale for Rule 10.8 - Printable Version +- MISRA Discussion Forums (https://forum.misra.org.uk) +-- Forum: MISRA C (https://forum.misra.org.uk/forumdisplay.php?fid=4) +--- Forum: MISRA C:2012 and MISRA C:2023 guidelines (https://forum.misra.org.uk/forumdisplay.php?fid=21) +---- Forum: 8.10 The essential type model (https://forum.misra.org.uk/forumdisplay.php?fid=165) +---- Thread: Clarification of Rationale for Rule 10.8 (/showthread.php?tid=1006)

Clarification of Rationale for Rule 10.8 - ogawa.kiyoshi - 12-12-2013 Rule 10.8 Rationale 3rd paragraph, "On a 16-bit machine the addition will be performed in 16 bits with the result wrapping modulo-2 before it is cast to 32 bits." It will be understood that. "On a 16-bit machine the addition will be performed in 16 bits with the result wrapping like modulo-2 before it is cast to 32 bits." or "On a 16-bit machine the addition will be performed in 16 bits with the result wrapping modulo-2^16 before it is cast to 32 bits." Which do you prefere? Re: Clarification of Rationale for Rule 10.8 - misra-c - 13-12-2013 We agree that the following wording would be clearer. “ On a 16-bit machine the addition will be performed in 16 bits with the result wrapping modulo-2^16 before it is cast to 32 bits.” where "^" means "raise to the power of"