02-07-2024, 07:11 AM
Updated answer
>> Info: SW2 = (PORTA.IN & (uint8_t)PIN5_bm) is a “register” (CPU)
PORTA.IN will be a volatile - hence if its position is anywhere other than the left-hand of the first logical operator, it is a violation of R.13.5
The "workaround" is, as you show, to read the volatiles into temporary variables (which the compiler will optimise away!) - if you make this a block-scope and have appropriate comments, this should be clear.
>> Info: SW2 = (PORTA.IN & (uint8_t)PIN5_bm) is a “register” (CPU)
PORTA.IN will be a volatile - hence if its position is anywhere other than the left-hand of the first logical operator, it is a violation of R.13.5
The "workaround" is, as you show, to read the volatiles into temporary variables (which the compiler will optimise away!) - if you make this a block-scope and have appropriate comments, this should be clear.
Posted by and on behalf of the MISRA C Working Group